lowRISC / ibex
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
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Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
Common SystemVerilog components
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
OpenTitan: Open source silicon root of trust
A simple parametrizable doorbell based mailbox
A minimal Linux-capable 64-bit RISC-V SoC built around CVA6
AXI Adapter(s) for RISC-V Atomic Operations
RISC-V Debug Support for our PULP RISC-V Cores
An energy-efficient RISC-V floating-point compute cluster.